- Architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs.
- Maintain end-to-end technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, and boundary scan.
- Lead cross-functional debug efforts for silicon issues.
- Drive resolution of critical silicon issues through post-silicon validation and bring-up.
- Evaluate and adopt emerging DFT methodologies and architecture schemes to improve robustness, quality, and yield.