Signal and Power Integrity Engineer
New
S
SPD TechnologyAI/ML hardware
Israel. United Kingdom. France. Germany. Netherlands. MexicoContractSenior
Salary not disclosed
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Job Details
- Experience
- 8 years of experience in SI/PI design for chip/package or system PCB.
- Required Skills
- PythonMatlab
Requirements
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 8 years of experience in SI/PI design for chip/package or system PCB.
- Experience with industry SI/PI modeling tool chains such as HFSS, ADS, Sigrity, or Siwave.
- Experience with lab bring-up, test environments, and characterization for high-speed memory and SerDes.
- Experience partnering across chip architecture, physical design, static timing analysis (STA), package, and validation teams.
- Experience with Python, MATLAB, or C++ for automated flows and data-processing tools.
- Bonus: Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture.
- Bonus: Deep knowledge of SI/PI analysis for high-speed interconnects including HBMx, D2D/chiplets, PCIe, and SerDes, and timing budget methodologies.
- Bonus: Direct experience with silicon interposers, silicon bridges, and 3D die stacking architectures.
Responsibilities
- Lead signal integrity and power integrity analysis and optimization for high-performance computing using advanced 2.5D/3D packaging technologies.
- Influence chip floorplanning, power distribution networks, netlists, and routability tradeoffs during early product definition.
- Evaluate high-speed interface IPs and develop next-generation memory interfaces across IO PHY, SI/PI, and physical design boundaries.
- Drive post-silicon validation and qualification for NPI, balancing SI/PI performance and DFM constraints through final package design closure.
- Partner with silicon, system, and external vendor teams.
- Develop simulation methodologies to improve modeling accuracy and efficiency.
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