Principal Logical Design Engineer - Chip Lead (Italy based)

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Requirements:

• 15+ years of experience in relevant roles.
• Technical leadership and proven expertise in silicon logical design, with a successful track record from concept to tape out.
• Strong technical understanding of all aspects of the front end ASIC design flow, including: System Verilog advanced coding techniques and best practices, Linting and Auditing flows, Synthesis, Timing and Physical constraints, and timing analysis, SVA for design, formal property checking, An understanding of DFT requirements, Development of design flows, best practice and guidelines to help drive team efficiency
• Mastery of industry-standard Electronic Design Automation (EDA) tools for design and verification
• Proficiency in scripting languages (e.g., Python, TCL) for automation and advanced tool scripting.
• Exceptional analytical, problem-solving, and debugging skills.
• Strong contributor to positive team dynamics
• Outstanding communication skills
• Fluency in English with excellent verbal and written communication.
• Ability to communicate effectively in a remote, multicultural organization.
• Proven capability to align and coordinate across teams with competing priorities.
• Skilled at delivering constructive feedback to both internal and external stakeholders.

Responsibilities:

• Being an effective partner to architecture teams, collaborating to facilitate delivery of architecture specs and requirements
• Architect and implement advanced micro-architectures from high-level specifications for silicon components, meticulously adhering to performance, power, and area (PPA) metrics.
• Work with the Silicon Logical Design Director to ensure projects are well understood and resourced appropriately, including identifying delivery dependencies between LD and other depts and teams in Axelera AI.
• Co-ordinating LD sub teams to produce on-time, high quality deliverables.
• Actively engage in design reviews, contributing technical expertise to enhance overall design quality
• Mentoring both junior and senior team members
• Play a leading role in interviewing