- Translate system-level requirements into FPGA design specifications
- Write high-quality SystemVerilog to meet performance, quality, and schedule targets
- Develop and execute test and verification strategies for FPGA designs
- Create modular, reusable, synthesizable and verification IP for current and future projects
- Support debug and defect resolution, including validation, logging, and root-cause analysis
- Drive best practices for design quality, development processes, and continuous improvement
PythonBashCI/CD