ASIC/FPGA Verification Designer

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Requirements:

• Bachelor's degree in Electrical/Computer Engineering or related field.
• Minimum of 3 years of experience in ASIC/FPGA design verification.
• Proficient in Verilog/System Verilog/UVM.
• Strong knowledge of ASIC/FPGA design flows and methodologies.
• Solid understanding of digital design fundamentals and verification techniques.
• Experience with industry-standard protocols (e.g., PCIe, DDR, Ethernet).
• Practical experience with High Bandwidth Memory (HBM), security implementations, networking architectures, AXI integration, NOC design optimization, and ARM CPU subsystems.
• Strong analytical and problem-solving skills.
• Excellent communication and interpersonal skills.
• Ability to work independently and collaboratively in a fast-paced environment.

Responsibilities:

• Develop and execute comprehensive test plans, including directed and random test cases.
• Develop UVM environments and tests adhering to client coding guidelines.
• Debug and analyze issues at system, FPGA, and ASIC levels.
• Create and maintain test benches and simulation environments.
• Write functional coverage items and close coverage buckets.
• Collaborate with cross-functional teams on verification methodologies.
• Monitor regressions and assist in checklist closure.
• Develop and execute functional and performance verification strategies.
• Participate in design reviews and provide input on design specifications.